The present invention relates to structures, and more specifically, to via structures preventing the creation of void fails.
A semiconductor device contains an array of contacts interconnected by patterns of conductive wires. Due to the level of integration of devices and circuits on a semiconductor chip, interconnections can generally no longer be made by means of single level network on conductive lines and it is necessary to form two or more levels of conductive lines that are vertically spaced and separated by an intermediate insulator layer or dielectric layer.
Connections between the different levels of conductive lines can be made by means of vias which are etched through the insulator layers separating the levels. The vias are filled with metal to form via studs. The multiple levels of conductor wiring interconnection patterns operate to distribute signals among the circuits on the semiconductor chip.
In conventional semiconductor structures, via structures suffer from electromigration-induced voiding in damascene and dual-damascene wiring. To prevent electromigration of the via material, the via may be lined with a liner material, however, the addition of liner material increases the resistivity of the via, and thereby the semiconductor.